SRAM
UT8Q512E 4Mb QCOTS SRAM
- Density and organization
- 4 Mb; 512K × 8
- Maximum address access
- 20 ns at 3.3 V
- Interface
- Asynchronous; TTL-compatible I/O
Specifications
| Part Number | UT8Q512E |
|---|---|
| Flight Grade | QML-Q, QML-V |
| LET (MeV-cm^2/mg) | ≤110 |
| TID krad(Si) | 100 |
| Access Time | 20ns |
| Configuration | 512K x 8 |
| Density | 4Mb |
| Supply Voltage | +3.3V |
| Package | 36-Lead FP |
Technical specifications
| Specification | Value | Notes |
|---|---|---|
| Density and organization | 4 Mb; 512K × 8 | |
| Maximum address access | 20 ns at 3.3 V | |
| Interface | Asynchronous; TTL-compatible I/O | |
| Package | 36-lead ceramic flatpack | |
| SMD radiation-assurance options | 50 or 100 krad(Si) | Total-dose assurance must be specified in the order; generic screening flow does not guarantee radiation. |
Values are subject to the conditions and ordering options in the referenced product documentation.
Product overview
The UT8Q512E is a 4 Mb radiation-tolerant CMOS static RAM with 20 ns maximum address access at a 3.3 V supply. Its 512K × 8 organization, active-low chip enable and active-low output enable provide conventional asynchronous memory control. TTL-compatible input and output levels and a three-state bidirectional bus support connection to the host memory interface. The device uses a 36-lead ceramic flatpack, with quality and radiation-assurance options defined by its SMD ordering code. Select the appropriate voltage, package and temperature configuration for the design, and use the radiation-assured ordering option when the application requires guaranteed total-dose performance.
Documentation
Technical documents and resources
For product questions or additional technical information, contact Frontgrade https://www.frontgrade.com/contact-us-form.
Datasheet
App Note
Memory Power Calculator
IBIS Models
More about this product
Product features
- Asynchronous memory interface
- TTL-compatible input and output levels
- Three-state bidirectional data bus
Control the memory bus
Active-low chip enable, write enable and output enable control data access. Three-state output drivers isolate the device when deselected or writing.
Applications
- Fault-tolerant designs for low Earth orbit
Discuss your application
Contact Frontgrade to discuss UT8Q512E 4Mb QCOTS SRAM and the requirements of your application.