UT64BS1X433 Matrix-A Bus Switch

By providing bus isolation, the UT64BS1X433 can significantly reduce the amount of load capacitance seen by a host processor and memory devices. 

The reduction in both load capacitance and delay time significantly increase speed and performance compared to a discrete logic implementations or FPGA memory interface solution. 

The UT62BS1X433 also provides logic to control up to eight discrete devices per bank and can interface to four, UT8R4M39, 160Mb SRAM performance memories with any Frontgrade LEON processor, without the need for additional logic, to reduce total overall solution cost.

Features:

• 64-Channel, 1:4 Bus Switch

• +3.3V Single Power Supply

• RON 5 Ohms Typical

• Flat RON Characteristics over Channel Voltage

• 204ps Propagation Delay through Switch

• Transmission Gate Technology Allows for True Bi-Directional Operation

• Bus Holders Maintain Output States on All 64 Channels when Deselected

• Independent 5-Bit Address Decoding to Select 1 of 32 Devices

Applications:

• Microprocessor interfaces that require large amount of memory

• High-speed applications or systems with large bus capacitance

• Cost-sensitive applications that require bus isolation without an expensive 

Operational Environment:

• Temperature Range: -55°C to +125°C

• Total Ionizing Dose: <300 krad (Si)

• SEL Immune: ≤100 MeV-cm2/mg

Physical:

• 400-Pin CLGA, CBGA, CCGA

• 1mm Pitch

Power:

• 1mW/MHz  

Flight Grade:

• QML-Q, QML-V