Logic Devices
UT54ACTS220 Clock and Wait-State Generation Circuit
- Input clock
- 48 MHz
- Output clock
- 24 MHz
- Supply
- 5 V nominal
Specifications
| Part Number | UT54ACTS220 |
|---|---|
| Flight Grade | QML-Q |
| LET (MeV·cm²/mg) | ≤120 |
| TID krad(Si) | 1000 |
| Input Buffer | TTL |
| Supply Voltage | =+5V |
| Package | 14-Lead Flat Pack |
Technical specifications
| Specification | Value |
|---|---|
| Input clock | 48 MHz |
| Output clock | 24 MHz |
| Supply | 5 V nominal |
| Temperature | -55°C to +125°C |
| Package options | 14-pin DIP or 14-lead flatpack |
Values are subject to the conditions and ordering options in the referenced product documentation.
Product overview
The UT54ACTS220 generates clock and wait-state signals for the UT69151 SµMMIT family. A divide-by-two circuit accepts a 48 MHz TTL clock input and provides a 24 MHz CMOS clock output. The wait-state circuit delays the falling edge of DTACK to generate a single wait state. Its timing logic generates DTACK from the falling edge of RCS, synchronized to the 24 MHz clock; the SµMMIT device supplies RCS and DMACK. The circuit is characterized over the -55°C to +125°C military temperature range.
Documentation
Technical documents and resources
For product questions or additional technical information, contact Frontgrade https://www.frontgrade.com/contact-us-form.
Datasheet
Application Notes
More about this product
Product features
- Divide-by-two clock generation
- Single wait-state generation
- TTL clock input and CMOS output buffering
SµMMIT clock and wait-state timing
A divide-by-two circuit accepts a 48 MHz TTL clock input and provides a 24 MHz CMOS clock output. The wait-state circuit delays the falling edge of DTACK to generate a single wait state. Its timing logic generates DTACK from the falling edge of RCS, synchronized to the 24 MHz clock; the SµMMIT device supplies RCS and DMACK.
Applications
- UT69151 SµMMIT timing support
Discuss your application
Contact Frontgrade to discuss UT54ACTS220 Clock and Wait-State Generation Circuit and the requirements of your application.