Logic Devices
UT54ACS630 RadHard EDAC
- Type
- Logic Devices
- Part
- UT54ACS630
- Capability
- Microelectronics
Specifications
| Part Number | UT54ACS630 |
|---|---|
| Flight Grade | QML-Q |
| LET (MeV·cm²/mg) | ≤108 |
| TID krad(Si) | 100 |
| Input Buffer | TTL |
| Supply Voltage | =+5V |
| Package | 28-Lead Flat Pack |
Technical specifications
| Specification | Value | Notes |
|---|---|---|
| Data width | 16 bits | Radiation rating applies to the radiation-assured order where applicable. |
| Check-word width | 6 bits | Radiation rating applies to the radiation-assured order where applicable. |
| Read-word width | 22 bits | Radiation rating applies to the radiation-assured order where applicable. |
| Operating supply | 4.5 V to 5.5 V | Radiation rating applies to the radiation-assured order where applicable. |
| Package | 28-lead flatpack | Radiation rating applies to the radiation-assured order where applicable. |
| Total-dose capability | 100 krad(Si) | Radiation rating applies to the radiation-assured order where applicable. |
Values are subject to the conditions and ordering options in the referenced product documentation.
Product overview
The UT54ACS630 is a parallel error-detection and correction circuit for 16-bit data words. It generates a six-bit check word using a modified Hamming code, stores that check word with the data, and evaluates the resulting 22-bit word during a read. Single-bit errors in data are flagged and corrected; errors in check bits are flagged but not corrected. A six-bit syndrome identifies the incorrect bit. Bidirectional data and check-bit buses support the encode and check operations, while dedicated error outputs report detected conditions.
Documentation
Technical documents and resources
For product questions or additional technical information, contact Frontgrade https://www.frontgrade.com/contact-us-form.
Datasheet
Application Notes
More about this product
Product features
- Modified Hamming-code processing
- Single-bit data-error correction
- Six-bit error syndrome
- Separate data and check-bit buses
Memory-word error checking
It generates a six-bit check word using a modified Hamming code, stores that check word with the data, and evaluates the resulting 22-bit word during a read. Single-bit errors in data are flagged and corrected; errors in check bits are flagged but not corrected. A six-bit syndrome identifies the incorrect bit.
Applications
- Memory error detection and correction
Discuss your application
Contact Frontgrade to discuss UT54ACS630 RadHard EDAC and the requirements of your application.