Logic Devices

UT54ACS273E Flip-Flops Octal D with Clear

UT54ACS273E contains eight positive-edge-triggered D-type flip-flops with individual data inputs and a direct clear input.
Logic function
Octal D flip-flops with clear
Type
Logic Devices
Part
UT54ACS273E
Specifications

Specifications

Product specifications
Part Number UT54ACS273E
Flight Grade QML-Q, QML-V
LET (MeV·cm²/mg) ≤120
TID krad(Si) 1000
Input Buffer CMOS
Supply Voltage =+3.3V+5V
Package 20-Lead Flat Pack

Technical specifications

Specification Value Notes
Logic function Octal D flip-flops with clear
Recommended supply voltage 3.0 to 5.5 V Recommended operating conditions; use the exact ACS or ACTS electrical table for input thresholds.
Operating case temperature -55°C to +125°C Recommended operating conditions; prototype screening may be room-temperature only.
Package options 20-lead flatpack Package availability depends on orderable variant.
Screening process options QML Q or QML V Select the applicable ordering option; prototype flow does not imply QML screening.
Total-dose capability Up to 1 Mrad(Si) Radiation-assured ordering option only; specify applicable SMD RHA level. Prototype/commercial flows do not imply radiation assurance.

Values are subject to the conditions and ordering options in the referenced product documentation.

Product overview

UT54ACS273E contains eight positive-edge-triggered D-type flip-flops with individual data inputs and a direct clear input. Data meeting setup requirements transfers to the outputs on the positive-going clock edge. Buffered clock and clear inputs support buffer/storage registers, shift registers, and pattern generators. Its recommended supply range is 3.0 to 5.5 V. The device is characterized over a case-temperature range of -55°C to +125°C. QML Q and QML V process options are documented; select the orderable device and screening level for the required application.

More about this product

Product features

  • Eight data inputs with shared clock and clear
  • QML Q and QML V process options

Logic operation

UT54ACS273E contains eight positive-edge-triggered D-type flip-flops with individual data inputs and a direct clear input. Data meeting setup requirements transfers to the outputs on the positive-going clock edge. Buffered clock and clear inputs support buffer/storage registers, shift registers, and pattern generators.

Applications

  • Glue logic
Product support

Discuss your application

Contact Frontgrade to discuss UT54ACS273E Flip-Flops Octal D with Clear and the requirements of your application.